Microchip Launched PIC32CM JH, a 32-bit Microcontroller Based on the Arm Cortex-M0+ Core
Views : 129
Update time : 2022-09-17 14:23:54
To provide manufacturers with microcontroller solutions that comply with ISO 26262 functional safety and ISO/SAE 21434 cybersecurity engineering standards, Microchip Technology Inc. today announced the PIC32CM JH microcontroller. This is the industry's first microcontroller based on the Arm® Cortex®-M0+ architecture to support AUTOSAR, memory built-in self-test (MBIST) and secure boot.
The PIC32CM JH is compatible with AUTOSAR, an open software architecture that provides vendors with the ability to adapt to lower-level hardware but retain the original application code, making it easier to migrate between designs. AUTOSAR-enabled designs are designed to simplify the development process and reduce total cost of ownership. When using AUTOSAR, Microchip provides an ASIL B Microcontroller Abstraction Layer (MCAL) for functional safety applications, providing a low-level hardware interface to the microcontroller.
Automotive OEMs need functional safety and cyber security protection for many in-vehicle applications, including touch buttons and touch wheels, door controls and console controls, and body applications such as Advanced Driver Assistance Systems (ADAS).The PIC32CM JH works with Microchip's Trust Anchor TA100 CryptoAutomotive™ security IC to comply with the new ISO/SAE 21434 automotive cybersecurity standard. TA100 employs ultra-secure hardware-based cryptographic key storage and encryption countermeasures to eliminate potential backdoors associated with software weaknesses.
With the PIC32CM JH microcontroller, Microchip can meet the growing demand for designing microcontroller solutions with functional security and cybersecurity protection, which is especially important in the automotive industry," said Rod Drake, vice president of Microchip's 32-bit microcontroller business unit. OEMs and other manufacturers now have the option to to use an entry-level microcontroller based on the Arm Cortex-M0+ to meet compliance requirements that were previously only possible with high-end microcontrollers."
Secure boot is part of the hardware designed to certify code to ensure it is valid and prevent malicious code from being loaded onto the microcontroller. other hardware features of the PIC32CM JH microcontroller include error correction code (ECC) with fault injection, loopback for the communication interface, system memory protection unit and memory built-in self-test (MBIST). All of these safety mechanisms are designed to meet ISO 26262, IEC 61508 and IEC 60730 standards.
MBIST is the industry standard method for testing embedded memory and allows for rapid testing of static random access memory (SRAM) integrity to ensure code can function properly, thereby reducing failures. To support developers' deployments, the PIC32CM JH is equipped with functional safety-related resources such as safety manuals, Failure Mode Effects and Diagnostic Analysis (FMEDA), and diagnostic codes for ISO 26262 ASIL B (Automotive Safety Integrity Level) safety levels.
In addition, the PIC32CM JH features advanced Driven Shield Plus touch functionality to support noise-proof and water-resistant operation. This feature is essential for home appliances, industrial and automotive applications where touch operation must be adapted to a variety of harsh environments.
