TSMC's second-generation 3nm process arrives with N3E chips already flowing
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Update time : 2022-10-27 10:10:35
Alphawave said Oct. 26 that it has tape out one of the industry's first chips using TSMC's N3E manufacturing technology, the second-generation 3nm process node. The chip has been manufactured by TSMC and has successfully passed all necessary tests and will be demonstrated at TSMC's OIP Forum later this week.
The chip is the Alphawave IP ZeusCORE100 1-112Gbps NRZ / PAM4 Serializer-Deserializer (SerDes), which supports numerous standards that will be popular in the coming years, including 800G Ethernet, OIF 112G-CEI, PCIe 6.0 and CXL3.0. The SerDes is said to support ultra-long lanes, providing next-generation servers with flexible connectivity solutions.
Alphawave is proud to be one of the first companies to utilize TSMC's state-of-the-art 3nm technology," said Tony Pialis, President and CEO of Alphawave. Our partnership will continue to bring innovative high-speed connectivity technologies to power the most advanced data centers, and we are excited to showcase these solutions at the TSMC OIP Forum event." TSMC plans to launch five 3nm-scale process technologies over the next two to three years, with the first generation 3nm process, N3, expected to be used by TSMC's large customer Apple for a few designs, and the second generation 3nm process, N3E, which will have an improved process window, meaning faster throughput times, higher yields, higher performance and lower power consumption. N3E is expected to be more widely adopted than N3, but its mass production is scheduled to begin in mid-2023 or the third quarter of 2023, about a year after TSMC launches high-volume manufacturing (HVM) using its N3 production node.
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